The present disclosure relates to a structure including a switching device including a transistor and an on-chip inductor with frequency-dependent inductance.
Millimeter wave refers to the spectral range of electromagnetic radiation in which the wavelength of the electromagnetic radiation is from 1.0 mm to 10 mm in vacuum. This range of electromagnetic radiation corresponds to the frequency range from 30 GHz to 300 GHz, which is also referred to as extremely high frequency (EHF) range. This range of frequency is considered to be the highest radio frequency band, above which the electromagnetic radiation is considered to be far infrared light. Millimeter waves are employed for broadband internet access including wireless communications.
On-chip switches for operation at millimeter wave range, i.e., in the EHF range, are highly in demand for many applications including digital and analog applications. These on-chip switches employ a transistor, which is typically a field effect transistor to provide low on-state resistance to provide a low-loss signal transmission path. However, the transistor employed as the on-chip switch typically has a significant off-state capacitance, which provides a parasitic capacitance sufficiently high to couple an input signal to capacitively couple to the output node of the on-chip switch. In order to prevent the capacitive coupling of the signal between the input node and the output node in the off-state, conventional on-chip switches include an inductor connected in parallel with the capacitor between the input node and the output node of the on-chip switch.
Referring to FIG. 1A, a first prior art circuit represents a prior art on-chip switch. The first prior art circuit includes a field effect transistor T and a fixed inductance inductor having an inductance of L that are connected in a parallel connection between a first node N1 and a second node N2. For example, the first node N1 can be an input node and the second node N2 can be an output node.
Referring to FIG. 1B, a second prior art circuit represents the prior art on-chip switch of FIG. 1A as a set of interconnected equivalent electronic components. The field effect transistor T of the first prior art circuit is represented by a combination of an ideal switch S, a parasitic resistor having the on-state resistance of the transistor Ron, and a parasitic capacitor having the off-state capacitance Coff. The on-state impedance of the first and second prior art circuits, i.e., the effective impedance Zeff of the first and second prior art circuits while the transistor T is turned on, is equal to the on-state resistance of the transistor Ron. The off-state impedance of the first and second prior art circuits, i.e., the effective impedance Zeff of the second prior art circuit while the transistor T is turned off, is given by:
                              Z          eff                =                              j2π            ⁡                          (                              fL                                  1                  -                                      4                    ⁢                                          π                      2                                        ⁢                                          f                      2                                        ⁢                                          LC                      off                                                                                  )                                .                                    (                  Eq          .                                          ⁢          1                )            
In order to maximize the off-state capacitance of the second prior art circuit at an optimal operating frequency of f0, the value of the inductance L needs to be:
                    L        =                              1                          4              ⁢                              π                2                            ⁢                              f                0                2                            ⁢                              C                off                                              .                                    (                  Eq          .                                          ⁢          2                )            
In other words, the effective impedance Zeff of the second prior art circuits diverges to infinity when the value of the inductance L satisfies (Eq. 2). In this case, the effective impedance Zeff of the second prior art circuit at a general operating frequency f while the transistor T is turned off is given by:
                              Z          eff                =                              j                          2              ⁢              π              ⁢                                                          ⁢                              f                0                            ⁢                              C                off                                              ⁢                                    (                                                f                  /                                      f                    0                                                                    1                  -                                                            f                      2                                        /                                          f                      0                      2                                                                                  )                        .                                              (                  Eq          .                                          ⁢          3                )            
When the operating frequency f is at the optimal operating frequency of f0, the effective impedance Zeff of the second prior art circuit diverges to infinity. In this case, the second prior art circuit provides a complete decoupling between the first node N1 and the second node N2. When the operating frequency f deviates from the optimal operating frequency of f0, however, the effective impedance Zeff of the second prior art circuit becomes a finite number.
For example, a prior art switching circuit designed to operate at 60 GHz may be subjected to operation at 54 GHz or at 66 GHz. In an illustrative example, if a sub-optimal operating frequency is selected to be 0.9 times the optimal operating frequency, as in the case of operation at 54 GHz of a circuit optimized for 60 GHz operation, the frequency ratio f/f0 is 0.9, and the effective impedance Zeff of the second prior art circuit is given by:
                              Z          eff                ≅                                            4.74              ⁢              j                                      2              ⁢              π              ⁢                                                          ⁢                              f                0                            ⁢                              C                off                                              .                                    (                  Eq          .                                          ⁢          4                )            
In another illustrative example, if a supra-optimal operating frequency is selected to be 1.1 times the optimal operating frequency, as in the case of operation at 66 GHz of a circuit optimized for 60 GHz operation, the frequency ration f/f0 is 1.1, and the effective impedance Zeff of the second prior art circuit is given by:
                              Z          eff                ≅                  -                                                    5.24                ⁢                j                                            2                ⁢                π                ⁢                                                                  ⁢                                  f                  0                                ⁢                                  C                  off                                                      .                                              (                  Eq          .                                          ⁢          5                )            
Thus, when the operating frequency of the prior art on-chip switch represented by the first and second prior art circuits of FIGS. 1A and 1B deviates from the optimal operating frequency, the net effect is a coupling across the first node N1 and the second node that has a magnitude of about one fifth of the uncompensated off-state capacitive coupling due to the parasitic capacitor having the off-state capacitance Coff. The coupling is capacitive if the operating frequency is sub-optimal, and is inductive if the operating frequency is supra-optimal. Thus, the parasitic coupling across the first node N1 and the second node N2 at non-optimal frequencies severely limit the operation of the prior art on-chip switch at multiple operating frequencies.
Many semiconductor applications require, however, multiple operating frequencies. In such circuits, it is desirable for an on-chip switch to provide high quality signal isolation during an off-state without a significant amount of signal coupling across the input node and the output node at multiple operating frequencies.